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25资产
求道友帮忙下载几篇论文,感谢
1、A 6.3-8.7 GHz Phase-Locked Loop in 65nm CMOS
2、Additive High-Speed Synchronization Techniques in PLL Systems
3、A 0.8-V, 2.55-GHz, 2.62-mW Charge-Pump PLL With High Spectrum Purity
4、A 25.8GHz Integer-N PLL With Time-Amplifying Phase-Frequency Detector Achieving 60fsrms Jitter, -252.8dB FoMJ, and Robust Lock Acquisition Performance
5、A 3.37-7.18 GHz Wideband PLL with Multi-core VCO in 180-nm CMOS
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