芯片后端设计工程师——车企合作，车规黑马，薪资可谈——base北京/上海/武汉

雨霖铃

base 北京/武汉/上海 —— 工程师~资深专家  各个级别都要，根据工作年限or能力定级别 ——薪资可谈


Job Description
Work with Front-End design team and physical design team for super large-scale SoC chip physical implementation from RTL to GDS. Focus on physical design of deep sub-micron ultra large chip including block and chip level synthesis, floorplan, place and route, timing closure, physical verification, EM/IR signoff checks etc. The individual is expected to be an expert in multiple aspects in PD areas and provide technically leadership to the engineering team.

Job Requirement
1. Hands on experience in super large-scale SoC chip physical design, especially experience in 7nm FinFet technology and high-speed design implementation.
2. Solid knowledge and rich experience on synthesis, floorplan, place, CTS and routing, static timing analysis, EM/IR-drop and physical verification.
3. Project experience on hierarchical flow such as top-level partition, timing budgeting, pin assignment and Power Network Planning etc
4. Expertise with Synopsys/Cadence/Mentor EDA tools
5. Familiar with Unix/Linux environment and good at scripts
6. A high-level of self-motivation and a proactive approach to solving problems.
7. Good communication skills, strong interpersonal skills and the flexibility
8. Dedicated, hardworking, and good team player


意向加微：hhj166666