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EETOP诚邀模拟IC相关培训讲师 创芯人才网--重磅上线啦!
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[资料] 《AIB_Specification_2.0》

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发表于 2022-5-21 00:01:34 | 显示全部楼层 |阅读模式

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This specification describes the Advanced Interconnect Bus (AIB) architecture,
interconnect attributes, signal management, and the configuration interface required to
design and build systems and peripherals that are compliant with the AIB specification.
The AIB is intended for interconnecting chiplets mounted within a package with signal
distances of 10 millimeters or less (often referred to as Ultra-Short Reach). While no
maximum interconnect distance is specified, AIB signal electrical requirements detailed
in Section 4 shall be met. AIB is not intended for signals interconnecting or connecting
to external package pins.
The specification is intended to provide interoperation between compliant chiplets.
Choices made by the chiplet designer with respect to such elements as number and
type of data signals, maximum supported clock speed, and any functionality that
exceeds the minimum requirements established in the AIB specification should be
documented in the chiplet datasheet.
AIB is a physical interconnect. Link, protocol and application layers are implemented on
top of the AIB interface.

AIB_Specification_2.0.pdf

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发表于 2022-5-21 17:29:38 | 显示全部楼层
very good thx
发表于 2022-5-21 18:21:24 | 显示全部楼层
多谢分享 多谢分享 多谢分享  
发表于 2022-5-21 21:17:28 | 显示全部楼层
kankana
发表于 2022-5-21 21:40:48 | 显示全部楼层
谢谢分享
发表于 2022-5-21 22:26:53 | 显示全部楼层
thanks
发表于 2022-5-21 23:35:21 | 显示全部楼层
多谢分享
发表于 2022-5-30 17:19:58 | 显示全部楼层
thanks
发表于 2022-7-20 17:51:10 | 显示全部楼层
感谢分享~~~
发表于 2022-7-25 09:06:17 | 显示全部楼层
thanks
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