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[资料] 【按需下载】 time-Interleaved Analog-to-Digital Converters 小集合

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发表于 2022-1-15 21:44:42 | 显示全部楼层 |阅读模式

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Time-interleaved Analog-to-Digital Converters
Simon Louwsma, Ed van Tuijl, Bram Nauta (auth.)

Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of the time-interleaved Track & Hold, since it must be capable of handling signals in the GHz range with little distortion, and minimal power consumption. Timing calibration is not attractive, therefore design techniques are presented which do not require timing calibration.

The design of power efficient sub-ADCs is addressed with a theoretical analysis of a successive approximation converter and a pipeline converter. It turns out that the first can consume about 10 times less power than the latter, and this conclusion is supported by literature.

Time-interleaved Analog-to-Digital Converters describes the design of a high performance time-interleaved ADC, with much attention for practical design aspects, aiming at both industry and research. Measurements show best-inclass performance with a sample-rate of 1.8 GS/s, 7.9 ENOBs and a power efficiency of 1 pJ/conversion-step.



Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters
Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins (auth.)

Analog-to-Digital Converters (ADCs) play an important role in most modern signal processing and wireless communication systems where extensive signal manipulation is necessary to be performed by complicated digital signal processing (dsp) circuitry. This trend also creates the possibility of fabricating all functional blocks of a system in a single chip (System On Chip - SoC), with great reductions in cost, chip area and power consumption. However, this tendency places an increasing challenge, in terms of speed, resolution, power consumption, and noise performance, in the design of the front-end ADC which is usually the bottleneck of the whole system, especially under the unavoidable low supply-voltage imposed by technology scaling, as well as the requirement of battery operated portable devices. Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters will present new techniques tailored for low-voltage and high-speed Switched-Capacitor (SC) ADC with various design-specific considerations.

Background Calibration of Time-Interleaved Data Converters by Manar El-Chammas, .pdf

3.57 MB, 下载次数: 68 , 下载积分: 资产 -2 信元, 下载支出 2 信元

Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved .pdf

5.55 MB, 下载次数: 72 , 下载积分: 资产 -3 信元, 下载支出 3 信元

Time-interleaved Analog-to-Digital Converters by Simon Louwsma, Ed van Tuijl, Br.pdf

2.64 MB, 下载次数: 84 , 下载积分: 资产 -2 信元, 下载支出 2 信元

发表于 2022-1-16 09:23:14 | 显示全部楼层
Thanks for the share
发表于 2022-1-16 10:22:43 | 显示全部楼层
多谢分享 多谢分享 多谢分享
发表于 2022-1-16 20:14:51 | 显示全部楼层
kanakn
发表于 2022-1-18 18:12:57 | 显示全部楼层
good topic
3q for share~
发表于 2023-8-5 16:30:30 | 显示全部楼层
thanks
发表于 2023-8-6 06:34:14 | 显示全部楼层
Thanks!!!
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