关于SRAM的bitcell的版图，“fat”型的版图应该怎么画？

搓芯片的酋长

接刚刚的文字叙述

MAGA2020

搓芯片的酋长 发表于 2021-9-16 16:00
接刚刚的文字叙述

感谢前辈，回复三五个帖子了，真的感谢

MAGA2020

搓芯片的酋长 发表于 2021-9-16 16:00
接刚刚的文字叙述

求大佬告知照片出处

搓芯片的酋长

1 图片出处：Andrei Pavlov  - CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies_ Process-Aware SRAM Design and Test -Springer (2008)
2 推荐书：Robust SRAM Designs and Analysis
3 推荐书：Variation-Aware Advanced CMOS Devices and SRAM Changhwan_Shin 2016
4 推荐paper：Stable_SRAM_cell_design_for_the_32_nm_node_and_beyond
Design and Simulation of 6T SRAM Cell Architectures in 32nm Technology
New category of ultra-thin notchless 6T SRAM cell layout topologies for sub-22nm
A_10_nm_Si based_bulk_FinFETs_6T_SRAM_with_multiple_fin_heights_technology_for_25_better_static_noise_margin

MAGA2020

搓芯片的酋长 发表于 2021-9-17 09:07
1 图片出处：Andrei Pavlov  - CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologie ...

感谢