[北京/上海/深圳/武汉]内推DesignWare SERDES PHY AE (Post-Sales)

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Job Description and Requirements

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

Job description:
Do you have years of ASIC Design & Verification experience and love the technology? Are you looking for a dynamic work environment; enjoy interfacing with people and helping solve their problems? This may be the job for you!
As Post-sales Applications Engineer (AE) in the Solutions Group, you will work with a team of other dynamic and highly skilled AEs that provide technical support to customers of Synopsys’s DesignWare Mixed Signal PHY IP.
AEs work closely with customers of DesignWare Mixed Signal PHY IP in different applications and pushing the envelope in different ways, through various design stages from integration to Silicon debug of their chips and ultimately contribute to customers’ success using Synopsys IP.

Requirements:
BS, MS with 5+ years of IC design work-experience.
Candidate must be highly independent with a “can-do” attitude coupled with a strong understanding and extensive experience in overall ASIC design process is required.
Excellent verbal and written communication skills and negotiation skills is a must.
Time management skills to balance multiple high-priority tasks and projects.
Willingness to learn new skills and perform tasks that often go outside of the area of current expertise.

Highly Desirable:

Domain knowledge of USB3.x, PCIe2/3/4, SATA or GBE protocol is a strong plus

Familiarity with SOC design & verification is a strong plus

Familiarity with Synthesis, APR, CTS, STA is preferered

High speed AMS design/validation is preferered

Understanding of transmission-line fundamentals and signal-integrity concepts is preferered

Familiarity with ATE/DFT concepts and test program flow is preferered

Familiarity with Post silicon validation is preferered

Please submit your résumé to 176493713@qq.com if you're interested.