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Junctionless Field-Effect Transistors:Design, Modeling, and Simulation
Junctionless Field-Effect Transistors:Design, Modeling, and Simulation.pdf
(24.43 MB, 下载次数: 123 )
Copyright © 2019 by The Institute of Electrical and Electronics Engineers, Inc. All rights reserved.
Published by John Wiley & Sons, Inc., Hoboken, New Jersey.
Published simultaneously in Canada.
We are living in an era of supercomputing where smartphones, smartwatches, and smart technology have become an inevitable part of our daily life. The research and development in the feld of transistors, which forms the basic building block of the computing devices, has driven this “smart” revolution. The dimensions of the transistors have been incessantly scaled down to increase the number of transistors per chip, which has not only reduced the chip area enabling hand-held devices but also increased the functionality and operating frequency and decreased the power dissipation.
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