|
发表于 2020-12-25 12:34:33
|
显示全部楼层
(1) the CMFB resistors must own big resistance. Otherwise, the gain will be low, which will induce input offset.
(2) CMFB DC voltage is about VDD-Vthp, but this signal is connected to bottom NMOS, which has DC voltage about GND+Vthn. The DC level won't be aligned between CMFB circuit and amplifier.
Check "Analog Integrated Circuit design", Martin and Johns, Section 6.8, Fig 6.34. That one is better. |
|