【上海/北京】【平头哥】【内推】数字前端验证工程师

abinger

阿里平头哥正在大量招聘IC验证工程师，待遇丰厚，内推成功率高。有意者可发邮件至me_basic@163.com .

职位描述：

* Work with Architecture and Software teams to ensure micro-architecture and design is fully verified/validated across multiple platforms

* Contribute significantly to verification infrastructure development

* Development of System Verilog/UVM based protocol/traffic generators/checkers, development of test plan based on functional requirements

职位要求：

Masters degree desired, Bachelor's degree in CS/EE is required. 5+ years of relevant experience in ASIC verification field.

* Should have worked on developing/implementing test plans at the chip-level for complex ASICs.

* Fluent in System Verilog and scripting languages such as Python or Perl.

* Must have intimate knowledge of UVM methodology.

* Experience in the verification of SoC and other IPs such as CPU Subsystem, Ethernet, PCIE, DDR, Serdes etc.

* Knowledgeable about assertions and functional coverage

* Experience with code coverage, formal verification tools; familiarity with evolving verification methodologies.

* Very good communication skills and ability and desire to work in a geographically diverse team environment.

* Will be responsible for definition, development and execution of self-checking tests for complex digital ASICs

P.S. Please submit the English version of resume

abinger

内推继续有效，欢迎有意者咨询。

abinger

更新一下信息，招聘要求放宽到有三年验证经验即可。做过PCIE或者DDR或者spi/uart/i2c的优先考虑。

abinger

有意者可以发站内信或者邮件给我私聊。

abinger

欢迎感兴趣的同学发邮件咨询。