K库开发职位招聘上海成都北京

daisyyang

上海北京成都 K库职位招聘，有兴趣欢迎联系我了解详情，

微信 yy17cc，邮箱daisy@hibohr.com

Lib Characterization Engineer

Roles & Responsibilities

Standard-Cell & I/O timing model characterization and generation

Standard-Cell & I/O library Front-End/Back-End design kit generation, including LIB, verilog, LEF and ndm etc

Library characterization, validation flow development and maintenance

Requirements

Bachelor/Masters Degree in Electrical and Electronic Engineering/Computer Engineering/Computer Science

Experience in timing modeling tool, e.g. Liberate/Siliconsmart

Experience in Spectre/Hspice, Virtuoso schematic, layout experience is a plus.

Proficient in script programming with Perl, Tcl or Python