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[招聘] 【成都海光】招聘设计/验证工程师

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发表于 2019-5-24 19:11:21 | 显示全部楼层 |阅读模式

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成都海光深度计算部门招聘ASIC Design Engineer/AISC verification Engineer, 感兴趣的朋友请发简历至my_dipper@outlook.com,机会不错(特别是对打算从北上深回成都的朋友)北京,成都都有site,欢迎邮件咨询     
        
DCU(Deep Computing Unit)产品部:   
      
Job Title: ASIC Design Engineer   
      
Description:   
- SoC front-end design, including clock, reset, power and top connection   
- SPEC define, RTL deisng, quality check and module level synthesis   
- Support DV for function verification   
- Support software for driver development   
      
Qualifications:   
Must have:   
- minimum 3+/6+ years of ASIC design,   
- Proficient in Verilog HDL, knowledge of system architecture and design   
- Solid working experience with Arm architecture and AMBA   
- Familiar with front-end design flow and EDA tools   
- Strong problem solving, communication skills and good team work spirit   

      

Job Title: ASIC Verification Engineer   
      
Job Responsibilities:   
1. Responsible for design verification of cutting edge SoC projects.   
2. Participate in all SoC level function verification jobs including: SoC DV testbench and infrastructure development and maintenance   
3. Create and execute SoC testplan including data-path and interrupt, security, power management, etc.   
4. Implement directed and random test cases in C++/SV, as well as checkers and assertions   
5. Help to maintenance and improve DV environment building flow   
      
Requirements:   
1. MS with 5+ years experience in ASIC/SoC design verification   
2. Hand-on experience in all domains of complex ASIC DV flow from plan to coverage   
3. knowledgeable in Verilog, C, C++ & SV/UVM development, familiar with scripting languages like Perl/shell/tcl etc.   
4. Strong problem solving and communication skills, DV lead experience is a big plus   
5. Knowledge on computer architecture and high-speed IP interface protocol is preferred   
6. Experience in power-aware verification is preferred   



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