Verilog-A资料（安捷论的）模拟系统行为级仿真必备

344484693

Verilog-AMS HDL introduces a new data type, called net_discipline, for representing analog nets and declaring disciplines of all nets and regs. The

rocky2004

下了看看怎样吧

sfei.pku

thanks

donnie

多谢多谢啊

象眼

看来又是英文的读起来很费劲

carneval

scu01

:victory: :victory:

chenchengying

so kind of you

iseesky

顶！顶！顶！

sfei.pku

thanks