岗位:验证工程师
职位描述:Participate ASIC digital verification for various IP/SoC projects; Create verification plans with designers; Develop DV architecture and verification environment; Verification execution and sign-off. 职位要求:Excellent team work style; Solid IP/SoC verification background; Mass production for verified IP/SoC; Bachelor with 3+ years of experience in ASIC digital verification (Master with 2+ years ); Expert in System Verilog/UVM; Expert in scripting; Good English skills (read and write); Skills plus: Production experience in simulation acceleration solution;Production experience in in-circuit emulation solution;Familiar with x86 architecture;
工作地点:上海和昆山
非猎头,内部推荐,有考虑的发简历到我邮箱610448613@qq.com,也可QQ私聊。 |