J.M. Fournier, Patrice SennPublished 1990 in ESSCIRC '90: Sixteenth European Solid-State…
A 130 MHz CMOS video DAC with a current output for HDTV applications will be described. In order to achieve monotonicity and a high speed performance,a current cell matrix configuration and a parallel decoding circuit with one stage latches have been used. P channel devices used as current sources insure a low noise level and a ground referenced voltage output in double adaptation load (38 ohms / 20 pF). The experimental results have shown that the maximum conversion rate is 130 MHz and the integral and differential linearity errors are less than 0.5 LSB. The maximum glitch energy is 50 pS.V. The DAC has been developed in a 1 ¿m digital/analog CMOS technology. It dissipates 150 mW at a 130 MHz conversion rate. LESS