An 8 bit current steering DAC for offset compensation purposes in sensor arrays

hi_china59

An 8 bit current steering DAC for offset compensation purposes in sensor arrays
G. Bertotti1,2, A. Laifi1, E. Di Gioia1, M. Masoumi1, N. Dodel1, E. F. Scarselli2, and R. Thewes1
1Chair of Sensor and Actuator Systems, TU Berlin, Berlin, Germany
2ARCES, University of Bologna, Bologna, Italy

Abstract. An 8 bit segmented current steering DAC is presented for the compensation of mismatch of sensors with current output arranged in a large arrays. The DAC is implemented in a 1.8V supply voltage 180 nm standard CMOS technology. Post layout simulations reveal that the design target concerning a sampling frequency of 2.6MHz is exceeded, worst-case settling time equals 60.6 ns. The output current range is 0–10 μA, which translates into an LSB of 40 nA. Good linearity is achieved, INL<0.5 LSB and DNL<0.4 LSB, respectively. Static power consumption with the outputs operated at a voltage of 0.9V is approximately 10μW. Dynamic power, mainly consumed by switching activity of the digital circuit parts, amounts to 100μW at 2.6MHz operation frequency. Total area is 38.6×2933.0 μm2

joshuacp

Good.

student321

thanks

cdting

非常感謝~~~

flatty

look look!

QQben

谢谢分享

somo

Xie Xie

ibubapa

回复 1# hi_china59


    thanks for sharing

ysliu168

thanks

chiaohung0821

謝謝分享