寻tsmc 16nm FFC工艺library以及16nm下的SRAM compiler

tezhong · 发表于 2018-10-22 10:23:21

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如题，寻找TSMC 16nm（或12nm） FFC工艺library以及该工艺下的SRAM compiler，最好有databook方便我们确认。
手头的DC版本是L-2016.03-SP1。

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tezhong · 发表于 2018-10-22 15:01:49

我们的需求是用DC对自行研发的IP做一版综合，得到tsmc 16nm（或12nm）下的前端面积和频率。

tezhong · 发表于 2018-10-22 19:22:13

需求是用DC综合自研IP，得到tsmc 16nm（或12nm）下的前端面积和前端频率。

Forever_ · 发表于 2020-7-26 22:25:36

我也想找

小排骨 · 发表于 2023-2-3 14:31:13

兄弟找到没？找到了可以分享一下吗，价格可商量

sun029 · 发表于 2023-2-6 18:07:24

The MMU-600AE is a Functional Safety (FuSa) variant of the MMU-600 System-level Memory
Management Unit (SMMU) that translates an input address to an output address. This translation is based
on address mapping and memory attribute information that is available in the MMU-600AE internal
registers and translation tables.
The MMU-600AE implements the Arm SMMU architecture version 3.1, SMMUv3.1, as the Arm
®
System Memory Management Unit Architecture Specification, SMMU architecture version 3.0 and
version 3.1 defines.
An address translation from an input address to an output address is described as a stage of address
translation. The MMU-600AE can perform:
• Stage 1 translations that translate an input virtual address (VA) to an output physical address (PA) or
intermediate physical address (IPA).
• Stage 2 translations that translate an input IPA to an output PA.
• Combined stage 1 and stage 2 translations that translate an input VA to an IPA, and then translate that
IPA to an output PA. The MMU-600AE performs translation table walks for each stage of the
translation.

cmmjava · 发表于 2024-3-31 22:39:39

感谢分享

cmmjava · 发表于 2024-3-31 22:40:25

感谢分享

cmmjava · 发表于 2024-3-31 22:56:20

感谢分享

cmmjava · 发表于 2024-3-31 23:03:43

感谢分享

[求助] 寻tsmc 16nm FFC工艺library以及16nm下的SRAM compiler

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