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本帖最后由 zhayxiang 于 2018-9-11 22:18 编辑
Mentor家的Verification Academy发布了最新版的UVM Cookbook,给大家分享一下。
uvm-cookbook.pdf
(8.36 MB, 下载次数: 264 )
This newly-updated (2018) version conforms to the IEEE 1800.2 UVM Standard and promotes an emulation-friendly UVM testbench architecture that promotes reuse of your UVM environment as your project moves from simulation to emulation and beyond.
This new cookbook architectural change is to recommend the use of “splittransactors” where, instead of a driver/monitor component having a reference toa pin-level SystemVerilog interface, the transactor will have a reference to a“BFM interface” that supports a set of transaction-level methods called fromthe transactor. In addition to the architecture update, we have made thefollowing changes to the Cookbook: - Added "UVM Basics" Introduction section
- Streamlined "Testbench Architecture" chapter
- Some material moved to "UVM Basics"
- Focused on emulation-friendly architecture
- Rewrote and streamlined "DUT-Testbench Connections"
- Added "UVM Messaging" chapter
- Updated "Register Abstraction Layer" chapter to follow 1800.2
- Updated "Testbench Acceleration" chapter
- Updated "UVM Connect" chapter
顺带将IEEE 1800.2 UVM Standard也分享给大家。
UVM_1800.2-2017.pdf
(4.01 MB, 下载次数: 202 )
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