澜至电子科技诚聘IC英才（原澜起科技）！！！

montage2014

大部门	小部门	职位	工作地点	招聘人数
RD	SoC Design	Senior SoC  Design Engineer（BUS）	上海	1
		SoC Design  Engineer ( RTL Design )	上海	1
		asic  Design Engineer（Multimedia）	成都/上海	2
		SoC Verification Engineer	上海	1
		高級無線通訊算法設計工程師（WIFI）	台北/上海	1
		SoC Verification Engineer	杭州	1
	STB	RF Design Engineer（WIFI）	上海	1
	CAD	Senior CAD Engineer or CAD Manager	上海	1
	Physical Design	Physical Design/layout Engineer	上海	1
AE & Software	Software	高级现场应用工程师（偏硬件）	上海	1
		高级软件工程师（音视频）	苏州	1
		高级软件工程师（中间件&应用层）	成都	1
		软件测试工程师（黑盒测试）	成都	1
MA-WIFI		高级软件工程师（WIFI）	杭州	1

联系方式：

招聘联络人：

super.zhou@montage-lz.com

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TITLE:
SoC Design Engineer（BUS） ---上海

JOB DESCRIPTION:
1. Module-level architecture definition and design;
2. Module-level RTL implementation;
3. Simulation/Verification at both module level and system level;
4. Module-level synthesis and timing analysis;
5. Writing design spec and report;
6. FPGA/silicon debug on related modules.

JOB QUALIFICATIONS:
1. Bachelor degree or Master degree in ASIC Design Relevant;
2. ＞3 yearsof SoC design experience;
3. Experience on DDR or AXI/AHB bus structure and arbiter.
4. Solid knowledge on digital IC design; Strong skills of verilog RTL codingand simulation; Hands-on experiences on EDA tools, such as Cadence and Synopsystools; Familiar with C language;
5. Relevant experiences on STB product;
6. Good communication skills and Good oral/written English.

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TITLE:
ASIC Design Engineer（Multimedia） ---成都/上海

JOB RESPONSIBILITY：

1. Multimedia IP design including VideoDecoder, Video Post Processing, Audio, etc;

2. Testbench creation,and verification for module level, IP level, and system level;

3. IP delivery for SoCprojects, and co-work with SoC team to make sure the quality of IP meets thequality criteria.

JOB QUALIFICATIONS:

1. Bachelor or Master in Micro Electronics,Electronic Engineering, Computer Science or related;

2. More than 3 years experience in relatedfield;

3. Familiar with Verilog and C language;

4. Familiar with following domain(s) is oneplus

1) Image processing

2) Video processing

3) Video codec

4) Audio processing

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TITLE:
SoC Verification Engineer --- 上海

JOB DESCRPTION:

• Beresponsible for the development of the verification platform (SIM/EMU)including the scripts developing, SOC testbench building, evaluating thecutting edge of verification methodology and integrating them into theplatform.

• Beresponsible for the SoC database management, SoC simulation bring up,regression and coverage collection and analysis

•Implement the soc functional verification tasks from verification plandefinition to tests development on both sim and emu platform.

•Implement the gate level simulation, Low power simulation with UPF

EDUCATION REQUIREMENTS

Bachelor degree inElectrical Engineering or related area, MSEE is preferred

YEARS OF EXPERIENCEREQUIREMENT

2 years or aboveexperiences in ASIC/complex SoC verification.

QUALIFICATION:

KEY KNOWLEDGE, SKILLS ANDABBILITIES REQUIRED

• Hasstrong skill of the scripts languages(Python/Makefile/Perl), and has hands-onexperience of SOC simulation ENV development

•Familiar with hdl languages (Verilog/VHDL/SV), simulation tool-chain(IES/VCS/Questa) and testbench design with SV.

•Familiar with assemble instruction sets and know how to integrate low leveldriver software into SOC architecture. Solid debugging ability on armprocessors is preferred

•Experience of SOC designs with embedded processor and their integration withother system components including memory subsystems and peripherals

• Goodcommunication skills, will work with IP/SOC/CAD team closely

•Hands-on experience with UVM is a plus

•Experience related to Low Power Verification with UPF/CPF flow is a plus

•Experience with gate level simulation is preferred

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TITLE:高級無線通訊算法設計工程師 baseband ---台北/上海
工作內容：
1. dsp baseband algorithm design for WiFi digital communication systems;
2. Performance verification on the FPGA plaftform;
3. MATLAB/C/C++ coding,and simulation to verify the algorithm performance;
4. IC bring up, system verification and debugging;
5. Cross-Team co-operation to figure out system issues;
6. Architecture design for digital communication system;
7. Digital IC design for cost and power consumption efficiency for high speedcomputation logic system.

工作條件：
(1) 熟悉OFDM System 尤佳；
(2) 通訊IC 基頻模擬與設計；
(3) 具備信號處理，通道編碼、同步等相關知識與經驗。

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Senior Verification Engineer--- 杭州

JOB DESCRIPTION:

-IP Verification platformdevelopment and management;

-SOC simulation casebuild up and environment management;

-SOC regression.

JOB QUALIFICATIONS:

-Bachelor or Master inElectronics Engineer or related;

-Bachelor 4 years, Master2 years or above working experience in SoC verification;

-Working knowledge ofSV/UVM testbenches; Ability to develop UVM TB components; Ability to code tests,simulate and debug RTL; Hands on experience with tools like IRUN/VCS;

-Experience withscripting like Perl/Python.

-Experience withfunctional coverage/assertions will be a plus.

-Good communication andmanagement skill.

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Senior RF IC Design Engineer（WIFI/BT）---上海

JOB DESCRIPTION:

1.
Circuit design for IC blocks, such as LNA,Mixer, VGA/PGA, LPF/BPF, VCO, XO, PLL, LO, PDET, BG, or LDO, based on blockdesign specification; Since we have been working in low-power WiFi and BTtransceiver SoC’s, moreIC blocks need to be included, like PA, Modulator and DC-DC converter.

2.
Circuit simulation and post-layout simulationfor the IC blocks in SpectreRF/ Spectre and/or AMS over PVT;

3.
Layout floor planning and support for layoutdesign of the IC blocks;

4.
Test planning and characterization of the ICblocks in Lab and ATE environments;

5.
IC block topology and specification togetherwith chip design leader and system engineer.

JOB QUALIFICATIONS:

1.
PhD or MSEE with 2+/5+ years of experience inRF/Analog IC development;

2.
Advanced understanding of engineeringfundamentals;

3.
Advanced design skills in the following areas:
a. RFNA, Mixer, PA, VCO, Fractional-N Synthesizer;
b. Power management circuit : DC-DC converter, LDO;
c. Analog: Analog filter, calibration, RSSI, opamps, bandgap, references;

4.
Good understanding of device physics and CMOSfabrication processes;

5.
Good understanding of layout tradeoffs foroptimal performance and size;

Understanding of Spectre & SpectreRF tool.Verilog-AMS experience is a plus;

6.
Hand-on experience on test equipments;

7.
Understanding of analog/digital signalprocessing & communication system theory is a plus;

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TITLE:
CAD Manager ---上海

JOB DESCRIPTION
Leads company CAD group for design database management, CAD tools maintenanceand CAD flow development for RD teams.
Leads TCAD for foundry technology files setup and debug and tape out support.
1. Manage hardware and OS for RD team;
2. Support IC design teams for EDA tool setup and design database management;
3. Automate the design flow to promote engineering efficiency;
4. Develop necessary scripts or tools to support IC designers;
5. Provide training for design teams;
6. Work with multi-site employees to smooth the design flow across the world;
7. Foundry & EDA Vendor technology contact window.

QUALIFICATION:
1. BSEE with minimum 5-year or MSEE with minimum 3-year of experience;
2. Experienced with ASIC design flow, hierarchical physical design strategies,methodologies and understand deep sub-micron technology issues;
3. Familiar with EDA design flow for mixed-signal design;
4. Successful track records of taping out complex, 28/16 nm SOC chips;
5. Self-motivated, able to work independently or as a team player, excellentverbal and written communication skills in English;
6. Familiar with IT is a plus.

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TITLE:
Senior CAD Engineer ---上海

JOB DESCRIPTION
1. Support RD linux network, be familiar with hardware/OS/network;
2. Perl/SKill/TCL script support, developing necessary scripts or tools tosupport IC designers;
3. Support EDA design flow and EDA tool, for both frontend and backend;
4. Support timing characterization flow for stand cell, io, memory, analog ip.

QUALIFICATION:
1. BSEE with minimum 3-year or MSEE with minimum 1-year of experience;
2. Familiar with EDA design flow for mixed-signal design;
3. Familiar with UNIX/Linux Operating system,VNC;
4. Familiar with Computer languages such as C, C++, perl/TCL/C-shell/python;
5. LSF or SGE experience is a plus;
6. Good communication skills.

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TITLE:
Physical Design/layout Engineer
上海

JOB DESCRIPTION:
1. Perform analog/RF and mixed-signal circuit physical design; including highperformance LNA ,PLL, ADC/DAC, Amplifier, BandGap, regulators, I/O Cells etc;
2. Responsibilities include physical design of demanding mixed-signal andAnalog/RF layout blocks, chip-level floorplanning, place and route of digitalblocks, top-level chip assembly, full-chip verification, chip tapeout;
3.Perform layout verification (DRC, LVS and other rule checking in today’sadvanced IC technology);
4. Modify and verify in-house DRC & LVS command files.

QUALIFICATIONS:
1. BS with above 2 years of industry IC layout experience; BSEE is preferred;
2. Good understanding of basic electronic principles dealing with circuit andlayout design;
3. Solid understanding and experience in key analog layout considerations. Suchas device matching, parasitic, noise coupling, sensitive signal routing,current density and reliability considerations;
4. Familiar with layout methodologies, flow and CAD tools such as Cadencevirtuoso, PCELL layout, Calibre physical verification. Prefer experience withPlace and Route, full chip SOC integration, tape out;
5. Prior experience with stand-cell built is a plus.

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TITLE:
高级现场应用工程师（偏硬件）---上海

JOB DESCRIPTION:

1. Support customers withdesign-in of Montage consumer SOC products;

2. Assist the Sales teamin managing account relationship;

3. Understand and solvecustomer specific problems;

4. Conduct technical trainingand interface with engineering and product development teams.

JOB QUALIFICATIONS:

1. Bachelor degree orabove in Electronics Engineering,or related;

2. Good knowledge of DTVtechnology, preferably has done STB/DTV SOC system design;

3. >3 years ofconsumer electronics working experience;

4. Experienced in circuitdesign, circuit layout and components behavior;

5. Be able to understanddriver level programming is a plus;

6. Good communication andinterpersonal skill;

7. Self-motivating andable to work independently as well as with a team and /or customers;

8. Business trip isrequired.

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TITLE:
高级软件工程师（音视频） ---苏州

岗位职责：

a） 文件和网络播放器架构设计、开发、维护和优化；

b） 音视频编解码以及同步算法开发、维护和优化；

c） 测试代码的维护编写；

d） 芯片音视频相关功能验证；

任职要求：

a） 本科以上电子和计算机相关专业，良好的数理基础知识；

b） 5年以上软件开发经验，有扎实的C/C++、RTOS等嵌入式软件技术基础；

c） 熟悉DVB规格，对DVB/IPTV/OTT 等多媒体相关产品有了解或有相关项目经验；

d） 精通各种音视频编解码算法以及协议；

e） 有如下相关项目和技术经验优先

1.
对ffmpeg、mplayer、omx、gstreamer等开源项目及相关多媒体技术有深入的研究；

2.
熟悉HDMI协议以及Demux基本功能；

3.
熟悉DVB协议，有subtitle/teletext/CloseCaption/CGMS等协议栈实现的项目经验；

f） 乐观、积极，有良好的项目管理、时间管理、团队合作和沟通协调能力，能独挡一面解决复杂问题。

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TITLE:
高级软件工程师（中间件&应用层）---成都

工作內容：

1. Secured CAdevelopment.

2. STB/MultiMediaapplication development.

3. Driver development.

4. STB + IOT applicationdevelopment.

5. STB + AI application development.

6. System softwaredevelopment & integration.

7. Resolve Customer'sfield issues.

工作條件：

1. BS/MS degree major inCS or CS related field.

2. Be proficient eitherin Linux kernel or Linux application programming, be familiar

with Linux source code.

3. Strong experience inprogramming with C, C++/Java is a Plus.

4. Good programming anddebugging skills.

5. Good communicationskill, team work spirit, self-motivated.

6. Familiar with mips/ARMcpu architecture is a Plus.

7. Familiar with Iot/AIdomain knowledge is a Plus.

8. Familiar with Opensource software development is a Plus.

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TITLE:
软件测试工程师（黑盒测试）---成都

岗位职责：

- 执行测试用例并报告问题；

- 保证产品质量并推动研发人员尽快解决问题；

- 与项目经理沟通并维护客户及功能需求；

- 创建并维护用户界面规格，测试用例，及测试计划。

任职要求：

- 至少1年以上工作经验，专科及以上学历， 计算机、电子等相关专业毕业；

- 有机顶盒、数字电视、或其他音视频产品工作经验为佳；

- 有较好的沟通能力和文档能力；

- 能适应一定强度的出差；

- 英文读写能力较强。

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TITLE:
高级软件工程师（WIFI） ---杭州

岗位职责:

1. 基于单片机、ARM、或其他32位嵌入式SOC平台的产品应用开发；

2. 负责WIFI驱动的开发和问题调试。

任职要求：

1. 电子、自动控制、通信、测量、计算机相关专业本科及以上学历；

2. 熟悉linux wifi的USB,SDIO驱动,熟悉wpa_supplication的移植；

3. 熟悉WIFI的相关协议,熟悉FreeRTOS等相关的嵌入式操作系统；

4. WIFI三年工作经验,有WIFI芯片原厂经验优先。