Cadence PLL Verification Workshop

xianmingqing · 发表于 2019-9-4 16:26:42

谢谢

samuel_lee · 发表于 2019-9-7 19:49:50

look look

xiangjiang001 · 发表于 2019-9-13 22:05:44

你好，谢谢你的分享，好像少一个indSym1p3的model，可否继续分享哈

，多谢了

Loading /tools/eda/cadence/MMSIM101ISR4/tools.lnx86/cmi/lib/5.0/libinfineon_sh.so ...
Loading /tools/eda/cadence/MMSIM101ISR4/tools.lnx86/cmi/lib/5.0/libphilips_sh.so ...
Loading /tools/eda/cadence/MMSIM101ISR4/tools.lnx86/cmi/lib/5.0/libsparam_sh.so ...
Loading /tools/eda/cadence/MMSIM101ISR4/tools.lnx86/cmi/lib/5.0/libstmodels_sh.so ...

Time for NDB Parsing: CPU = 4.04139 s, elapsed = 4.10955 s.
Time accumulated: CPU = 4.04139 s, elapsed = 4.10955 s.
Peak resident memory used = 52.9 Mbytes.

Error found by spectre in `pll_vco_core', during circuit read-in.
ERROR (SFE-23): "input.scs" 852: L1 is an instance of an undefined model indSym1p3.

tpungi · 发表于 2019-9-15 22:18:05

THnkas for sharing

tpungi · 发表于 2019-9-15 22:18:51

THnkas for sharing

kupen · 发表于 2019-10-10 18:40:57

感谢分享！

startboy68 · 发表于 2019-11-24 00:03:17

very good

lga2200 · 发表于 2019-11-24 00:32:24

Thank you

lga2200 · 发表于 2019-11-24 00:33:59

bcfuyi321 · 发表于 2020-1-7 14:11:34

多谢分享

Cadence PLL Verification Workshop

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