template文件:
set_memory_type single_port_ram
set_memory_name a32x32
set_bypass_mode OFF
set_pipeline_mode OFF
set_writethrough_mode OFF
set_bist_mode OFF
set_mem_internal_node dummy
create_readwrite_port AD
set_clock CLK -active r -port AD
set_address_bus AD -width 5 -port AD
set_data_bus DIN -width 32 -port AD
set_read_enable WE -active L -port AD
set_chip_enable CEN -active L -port AD
set_data_output DOUT -width 32 -port AD