Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits

h11ws6mc0oo · 发表于 2007-8-11 23:09:23

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Defect-Oriented Testing for Nano-Metric CMOS VLSI CircuitsSeries: Frontiers in Electronic Testing , Vol. 34
Sachdev, Manoj, Pineda de Gyvez, José
Originally published as volume 10 in this series
2nd ed., 2007, XXI, 328 p., Hardcover
ISBN: 978-0-387-46546-3

Table of contents1.    Introduction.
2.    Functional and Parametric Defect Models.
3.    Digital CMOS Fault Modeling.
4.    Defects in Logic Circuits and their Test Implications.
5.    Testing Defects and Parametric Variations in RAMs.
6.    Defect Oriented Analog Testing.
7.    Yield Engineering.
8.    Conclusions.

h11ws6mc0oo · 发表于 2007-8-11 23:13:01

Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits

LAS.xs · 发表于 2007-8-12 10:33:19

kankan

pedro888 · 发表于 2007-8-13 10:26:52

thanks for your information...
thanks...................

飞雪 · 发表于 2007-8-13 10:43:14

kankan！

飞雪 · 发表于 2007-8-13 10:45:33

very nice!

mixsignal · 发表于 2007-8-13 10:49:49

I am not familiar with this section

飞雪 · 发表于 2007-8-13 10:59:57

thanks！

summerwaww · 发表于 2007-8-15 12:50:38

:victory:

zhxdoctor · 发表于 2007-8-15 22:55:17

Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits

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