modelsim生成vcd文件

suder · 发表于 2018-4-20 10:33:49

请教下，我用modelsim对电路仿真生成vcd文件的时候，为什么同一个时刻，一个节点会存在多个值？

dcircuit · 发表于 2018-4-20 19:13:22

tiaobian

suder · 发表于 2018-4-20 19:49:53

@dcircuit 不是应该一个节点/门在一个时刻对应一个值，为啥在这个瞬间还会跳变啊？
我用的电路是ISCAS85基准电路

student321 · 发表于 2018-4-21 19:34:10

简单点就是删一行，反读回去看看，是不是成斜波了

suder · 发表于 2018-4-21 19:40:20

@student321 我直接在modelsim看wave，好像没有出现这种多次跳变的情况

yuanpin318 · 发表于 2018-4-21 21:59:33

是不是zero time glitch?
modelsim 有办法显示的。
大概意思是t时刻，net is driven by a value, T+0, net is driven by another value.
If you think the RTL code as a program, then you can understand which part executed first, then second. Mostly it is because of race condition.

In default, modelsim just record latest value in VCD, you won't see the 0 time glitch in time t.

If you set one attribute in control file of modelsim (I can't remember, I think you can find it in modelsim userguide), it can help you to record this glitch, you can extend it in that time.

[求助] modelsim生成vcd文件

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