Cadence 上海招聘资深产品工程师-PHY IP

kengteng

Cadence 上海招聘资深产品工程师-PHY IP

更多职位信息敬请关注Cadence公众微信平台：Cadence微招聘

If you have interest, PLS send your update CV to job_china@cadence.com

Principal / Lead Product Engineering -PHY/ high speedSerDes

Description:     

This is a unique opportunity to join the rapidly growingProduct Engineering team in the IP Group at Cadence Design Systems. We are lookingfor a Lead Product Engineer who will be the main technical interface on keycustomer engagements deploying our advanced high speed PHY and SerDes IP.

Position is in high speed SerDes R&D team.  

Primary Responsibilities:

•           Supporting customers high speed SerDes SOC integration reviews, and systemintegration questions.

•           Support customers with SerDes silicon bring up and lab testing.

•           Presales technical support of customer demos and evaluations.

•           Primary technical link between SerDes R&D team and Field ApplicationEngineers

•           Generate technical SerDes specification, data sheets, and application notes.

•           Update R&D team with the latest customer feedback and competitive analysis.

                                               

PositionRequirements:              

•           M.S. Electrical/Computer Engineering (or similar degree)

•           2+ years experience developing or using high speed PHYs (8Gbps+)

•           Strong debug and problem solving skills.

•           Experience working with USB, SATA, PCIe, or Ethernet protocols.

•           Experience in SOC design implementation, from RTL to final GDS, and productionramp.

•           Verilog design, simulation, and static timing experience.

•           Familiarity with industry standard DFT flows and test methodologies.