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[求助] 帮帮我 Hspice cmos two stages opamps to optimize its gain and phase margin?

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发表于 2018-1-1 12:41:56 | 显示全部楼层 |阅读模式

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How to write a Hspice cmos two stages opamps to optimize its gain and phase margin?thank you
发表于 2018-1-2 12:35:04 | 显示全部楼层
在hspice的手册上有个例子可以参考一下
HSPICE® User Guide: Basic Simulation and Analysis
Chapter 29: Optimization

Optimizing MOS Op-amp
The design goals for the MOS operational amplifier are:
■ Minimize the gate area (and therefore the total cell area).
■ Minimize the power dissipation.
■ Open-loop transient step response of 100 ns for rising and falling edges.
The HSPICE strategy is:
■ Simultaneously optimize two amplifier cells for rising and falling edges.
■ Total power is power for two cells.
■ The optimization transient analysis must be longer to allow for a range of
values in intermediate results.
■ All transistor widths and lengths are optimized.
■ Calculate the transistor area algebraically use a voltage value and minimize
the resulting voltage.
■ The transistor area measure statement uses MINVAL, which assigns less
weight to the area minimization.
■ Optimizes the bias voltage.
Example: MOS Op-amp Optimization Input Netlist File
You can find the sample netlist for this example in the following directory:
$installdir/demo/hspice/ciropt/ampopt.sp
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