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AMD超威半导体招聘 Design Verification Engineer,请有意向者将简历发送到
Cherry.Zhang@amd.com
RESPONSIBILITIES:
oLead a team and perform project planning, estimation, tracking, mentoring, reviews, etc.
oPlan and conduct reviews and work with other NBIO groups
oEnsure that metrics are established to measure the IP quality
oEvaluation/review of all new or existing methods, comparing them to established procedures and standards both technical and non-technical and champion where applicable
oPlan and conduct test centric Post Mortem evaluation/review
oDevelop and implement design quality control and improvement processes
oConstantly look to improve design productivity
oLeading the Team's development of leading edge innovative IP level features
oManage staff career development, goal planning and day-to-day problem resolution
oHands-on resolution of problems and priority calls
oCarry milestone definition on complex ASIC/SoC designs - management of
"gate" criteria
oRepresent the team in the AMD engineering community
oExperience with industry standard protocols and interfaces such as AXI4, ACE-lite and/or PIPE
oResolve complex problems involving:
o advanced static timing analysis and formal verification
o RTL Linting and CDC checking
o ASIC/SoC Design flows and methodology implementations and enhancements
o IP/sub-system/SoC problems
REQUIREMENTS:
o10+ years professional experience including SOC/PCIe/Fabrics/MMU Design
oCommunication skills: excellent oral, written and presentation skills
oLeadership experience in productivity improvement
oFamiliar with aspects of IP Design Goals and Milestones
oWorking knowledge of Verilog, System Verilog, C/C++, Perl/Python
oGood understanding of PCIe, Hyper-Transport (HT) protocols
oAt least 3 years of management experience with proven record of dealing with hiring, performance management and coaching of employees
oChipset and Fusion architecture and design knowledge (Northbridge, FCH, DDR Interface, Memory controllers)
oDFT, Debug knowledge
oSelf-starter and quick learner and able to achieve successful outcomes in a non-hierarchical environment, with minimal supervision or direction
oDetail oriented; ability to multitask through planning/organizing
oProject management skills and experience
EDUCATION:
oUniversity graduate (BE/BTECH/MTECH) in Electronics or Computer engineering |
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