【英伟达上海热招】ASIC Engineer （Verification）

Nvidia_Staffing

要求： 熟悉UVM SystemVerilog，有相关经验者或同时懂design者优先简历发送邮箱：nahu@nvidia.com
电话： 021-61041985

The NVIDIA Clock team is now looking for ASIC engineerswith strong logic design or verification background. In this position, youwill take part in all stages to design modern complex GPU chips withstate-of-art features and flows. To implement various functions, you will workdirectly with different global teams, as ARCH/SW, ASIC Design, CAD, Package,DFT and Physical Design teams. Additionally, you will be involved in definingand creating methodologies that create more efficient and flexible SOCs in future.

What you'll be doing:

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Module-level or Chip-level logic design, synthesis, timingconstraints,
and silicon bring-up.

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Module-level or Chip-level verification, both for function andtest mode

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Methodology or Flow development for above tasks.

What we need to see:

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BS / MS in electrical / computer engineering and related.

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Understand ASIC design/verification/implementationflow

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Familiar with design/verification languages as C/C++, Verilog orVHDL

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Know industrial standard scripting language as Perl, or Python,TCL, Ruby

Ways to stand out from the crowd:

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Excellent analytical and problem solving skills

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Fluent English and excellent communication skills

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Good team work spirit, easy to cooperate with team members

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Understand JTAG,DFT, or OCC is a plus