Cadence招聘数字前端实现工程师

kengteng

Title: Principal/Lead FEImplementation Engineer (数字前端实现)

Job location: Shanghai

更多职位信息敬请关注Cadence公众微信平台：Cadence微招聘

If you haveinterest, PLS send your update CV to job_china@cadence.com

Principal/Lead FEImplementation Engineer

  

PositionDescription:

•In charge of DDR PHY and HBM PHY IP FrontEnd Implementation.

•Daily duties include: RTL coding andIntegration, Logic Synthesis, Constraint development, Static Timing Analysis.

•HDL language Knowledge, like verilog isnecessary.

•C/C++/perl/tcl/csh/python, UNIX, Linuxexperience are plus.

•Excellent analytical and problem-solvingskills. Quick learner-able to learn and apply technical and complex topics.

•Excellent communication skills and theuncanny ability in a cooperative team environment are required.

•Self-motivated, result-oriented, can takeownership and follow-through on tasks.

PositionRequirements:

EssentialQualifications:

•Master degree or above, 7-10 years’ workexperience

•Major in Micro-electronics, ElectronicEngineering, Computer Science, Information Technology or equivalent

•Ability to work effectively alone or aswell as in the team.

•Essential that the individual demonstratesstrong communication, verbal and written

•Requires good communication skills inEnglish.

DesirableQualifications:

•Good at any following skill sets: Highspeed digital design implementation

•Experience of DDR IP or other high speeddigital design