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职位1:DigitalIC Design Engineer for Deep Learning (AI) 职位说明:
1.The AI digital designer implement the HW design based on thearchitecture defined by architecture team. This job includes the u-architecturedesign, RTL implementation, PPA optimization (through synthesis and poweranalysis tools), and co-work with DV team to verify the IPcorrectness
2.Digital RTL design and implementation
职位要求: 1. Familiar with Verilog design
2. Familiar with digital design flow, such as synthesis, DFT, STA, poweranalysis
3. Familiar with one or more of following tasks is a plus
* Paralleling processing design
* DSP/GPU/CPU design
* Design for Arithmetic operations
* Bus fabric or interface design, especially AMBA
* Dram controller, memory controller
* Security hardware, crypto-algorithm and hardare
* Design integration
职位2:Digital Verification Engineer for Deep Learning (AI) 职位说明:
1. Develop verification environment
2. Verify and debug processor and peripheral ip design form functional blocks tosystem-level
3. Low power and performance analysis and verification
职位要求: 1.Familiar with verification methodology and flow, UVM is a plus.
2. Familiar with AMBA bus and peripheral controller(for example DMA ...), andprocessor is a plus
3. Familiar with FPGA or emulator flow
4. Familiar with ASIC integration and verification flow.
5. Familiar with Perl, C, Verilog, SystemVerilog.
职位3:ICModeling Engineer for Deep Learning (AI) 职位说明:
1. Develop function C-model withC/C++
2. Develop performance C-model by C/C++ and SystemC
3. Coworkwith design team to support RTL debugging and verification
4. Coworkwith driver team to support driver interface definition andverification
5. Coworkwith compiler team to support compiler development and debugging
职位要求: 1.Familiar with C/C++ Programming
2. Familiar one of script language (Python or Perl)
3. FimiliarSystem C is a plus
4. Familiar with computer architecture including VLIW/SIMD/SIMT architecture,arithmetic operation, cache behavior, etc. |