吐血推荐，绝对权威：Berkeley的开关电源博士论文

sinomicro

吐血推荐，绝对权威：Berkeley的开关电源博士论文
绝对经典的开关电源书，系统的阐述了DC－DC的理论，电源IC设计者的指导书
Abstract
High-Efficiency Low-Voltage DC-DC Conversion for Portable
Applications
by
Anthony John Stratakos
Doctor of Philosophy in Engineering-Electrical Engineering
and Computer Sciences
University of California, Berkeley
Professor Robert W. Brodersen, Chair


Chapter 1: Introduction ....................................................................................................1
1.1 Motivation.....................................................................................................................1
1.2 The Challenge of Lower-Voltage DC-DC Conversion ..................................................3
1.2.1 Low-Voltage and High-Current.................................................................................................4
1.2.2 Low-Voltage and Low-Current .................................................................................................5
1.3 Research Goals and Contributions.................................................................................7
1.4 Thesis Organization .......................................................................................................8
Chapter 2: DC-DC Conversion as a Low-Power Enabler ...........................................10
2.1 Voltage Scaling for Low-Power...................................................................................11
2.1.1 Multiple Supply Voltages ........................................................................................................13
2.1.2 Architectural Voltage Scaling..................................................................................................14
2.1.3 Voltage Scaling with Vt Reduction .........................................................................................17
2.1.4 Discussion ...............................................................................................................................18
2.2 Dynamic Voltage Scaling for Energy-Efficient GPP...................................................18
2.2.1 Typical Processor Usage .........................................................................................................19
2.2.1.1 Sleep Mode ............................................................................................................20
2.2.1.2 Slow Clocks ...........................................................................................................21
2.2.2 Dynamic Voltage Scaling ........................................................................................................22
2.2.3 Discussion ...............................................................................................................................24
2.3 Low-Swing Interconnect..............................................................................................25
2.3.1 Discussion ...............................................................................................................................27
2.4 Voltage Regulation Enhances Battery Run-Time ........................................................28
2.4.1 A Piecewise Linear Model to a Low-Rate Battery Discharge Curve......................................30
2.4.2 Models for Battery Loading Conditions..................................................................................32
2.4.3 Case Study: An Analog Load with Supply-independent Biasing ...........................................33
2.4.3.1 Run directly from the cell ......................................................................................34
2.4.3.2 Run through a linear regulator ...............................................................................34
2.4.3.3 Run through a switching regulator.........................................................................34
2.4.4 Case Study: A Throughput-constrained Digital CMOS Load.................................................35
2.4.4.1 Run directly from cell ............................................................................................35
2.4.4.2 Run through a linear regulator ...............................................................................35
2.4.4.3 Run through a switching regulator.........................................................................36
2.4.5 Results .................................................................................................................. ...................36
2.4.6 Converter Size vs. Extra Battery Size .................................................................................... .39
Chapter 3: DC-DC Converter Fundamentals ...............................................................42
3.1 Introduction to Switching Regulators ..........................................................................42
3.1.1 Buck Converter .......................................................................................................................43
Table of Contents iv
3.2 DC-DC Requirements in Portable Systems .................................................................45
3.2.1 High Energy Efficiency...........................................................................................................45
3.2.2 Low Cost ................................................................................................................................46
3.2.3 Small Size...............................................................................................................................47
3.2.4 Low Noise ...............................................................................................................................48
3.3 PWM Operation ...........................................................................................................49
3.3.1 Output Filter Design................................................................................................................50
3.3.2 Sources of Dissipation.............................................................................................................53
3.3.2.1 Conduction Loss ....................................................................................................53
3.3.2.2 Gate-Drive Loss .....................................................................................................54
3.3.2.3 Timing Errors.........................................................................................................54
3.3.2.4 Stray Inductive Switching Loss .............................................................................56
3.3.2.5 Quiescent Operating Power ...................................................................................57
3.4 PFM Operation ............................................................................................................58
3.4.1 Output Filter Design................................................................................................................60
3.4.2 Sources of Dissipation.............................................................................................................63
3.4.2.1 Conduction Loss ....................................................................................................63
3.4.2.2 Gate-Drive Loss .....................................................................................................64
3.4.2.3 Switch Transitions and Timing Errors...................................................................64
3.4.2.4 Stray Inductive Switching Loss .............................................................................69
3.4.2.5 Quiescent Operating Power ...................................................................................69
3.5 Other Topologies..........................................................................................................70
3.6 Alternatives to Switching Regulators ..........................................................................73
3.6.1 Linear Regulators ....................................................................................................................73
3.6.2 Switched-Capacitor Converters...............................................................................................74
Chapter 4: DC-DC Design Techniques for Portable Applications..............................79
4.1 Converter Miniaturization............................................................................................79
4.1.1 High Frequency Operation ......................................................................................................80
4.1.2 Minimum Inductor Selection ..................................................................................................81
4.1.3 High Integration ......................................................................................................................83
4.2 Circuit Techniques for High Efficiency .......................................................................84
4.2.1 Synchronous Rectification ......................................................................................................84
4.2.1.1 Synchronous Rectifier Control ..............................................................................85
4.2.2 Zero-Voltage Switching...........................................................................................................86
4.2.3 Adaptive Dead-Time Control ..................................................................................................89
4.2.4 Dynamic Power Transistor Sizing...........................................................................................93
4.2.5 Reduced Swing Gate-Drive.....................................................................................................95
4.2.5.1 Zero-Order Analysis ..............................................................................................96
4.2.5.2 First-Order Analysis ..............................................................................................97
4.2.5.3 Scaling Vt ............................................................................................................101
4.2.5.4 CMOS Gate-Drive Design...................................................................................102
4.2.5.5 Optimum Vg ........................................................................................................111
4.2.5.6 Reduced Gate-Swing Circuit Implementation.....................................................112
4.2.6 Ultra-Low-Power PWM Control...........................................................................................114
4.2.7 PWM-PFM Control for Improved Energy Efficiency ..........................................................115
Table of Contents v
4.3 System-Level Considerations ....................................................................................116
4.3.1 Converter Topology Selection...............................................................................................117
4.3.1.1 Transformer-Coupled Topologies........................................................................118
4.3.2 Effects of Conversion Ratio ..................................................................................................119
4.3.3 Highest Integration ................................................................................................................121
4.3.4 Exploiting Subsystem Voltages .............................................................................................122
4.3.5 Shared Resources ..................................................................................................................122
Chapter 5: Design Considerations for Dynamic DC-DC Converters .......................124
5.1 Dynamic Converter Definitions.................................................................................124
5.2 DVS System Example ...............................................................................................128
5.3 Dynamic DC-DC Converter Performance Objectives...............................................130
5.3.1 Tracking Energy ....................................................................................................................130
5.3.2 Tracking Time .......................................................................................................................134
5.3.3 Regulation Energy.................................................................................................................135
5.3.4 Output Voltage Ripple ...........................................................................................................138
5.4 Impact of Performance Metrics on Power Circuit Design.........................................141
5.5 Impact of Performance Metrics on System Performance ..........................................142
5.6 Summary of Previous Work.......................................................................................144
Chapter 6: Prototype DC-DC Converters ...................................................................147
6.1 Processor Power Delivery System .............................................................................148
6.1.1 Supply Voltage Selection ......................................................................................................148
6.1.2 Shared Resources ..................................................................................................................150
6.1.3 Highest Integration ................................................................................................................150
6.2 An Ultra-Low-Voltage DC-DC Converter.................................................................150
6.2.1 Control System Design..........................................................................................................151
6.2.2 Circuit Implementation .........................................................................................................155
6.2.2.1 Master Control .....................................................................................................155
6.2.2.2 Vref-VLO Comparator ........................................................................................157
6.2.2.3 iNMOS Comparator.............................................................................................160
6.2.2.4 Master Bias ..........................................................................................................166
6.2.2.5 Voltage Reference................................................................................................167
6.2.3 Power Train Design...............................................................................................................168
6.2.4 Simulation Results.................................................................................................................169
6.2.5 Measured Results ..................................................................................................................171
6.3 Prototype Dynamic Voltage Scaling DC-DC Converter............................................177
6.3.1 System and Algorithm Description .......................................................................................177
6.3.1.1 PWM Control.......................................................................................................179
6.3.1.2 PFM Control ........................................................................................................181
6.3.1.3 Start-Up................................................................................................................182
6.3.1.4 System Simulation Results ..................................................................................183
6.3.2 Load Specifications ...............................................................................................................185
Table of Contents vi
6.3.3 External Component Selection..............................................................................................186
6.3.4 Frequency Detector ...............................................................................................................188
6.3.5 Loop Filter............................................................................................................................191
6.3.6 Current Comparators .............................................................................................................193
6.3.6.1 PMOS current limit..............................................................................................193
6.3.6.2 NMOS current limit .............................................................................................194
6.3.6.3 NMOS zero-current detection..............................................................................195
6.3.6.4 PMOS zero-current detection ..............................................................................197
6.3.7 Power FETs ...........................................................................................................................198
6.3.8 Summary of Expected Efficiency..........................................................................................200
6.3.9 layout, Assembly, and Test ..................................................................................................202
6.3.10 Measured Results ................................................................................................................206
6.3.10.1 Start-Up..............................................................................................................207
6.3.10.2 Tracking Performance and Current Limit..........................................................207
6.3.10.3 Regulation Performance ....................................................................................211
6.3.10.4 Synchronous Rectifier Control ..........................................................................216
6.3.10.5 Low Swing I/O Transceiver...............................................................................216
6.3.11 Conclusion..........................................................................................................................218
6.4 A ZVS PWM DC-DC Converter ...............................................................................219
6.4.1 Prototype Description............................................................................................................219
6.4.1.1 External Component Selection ............................................................................221
6.4.1.2 Adaptive Dead-Time Control ..............................................................................222
6.4.1.3 FET Sizing and Gate-Drive Design .....................................................................223
6.4.2 Measured Results ..................................................................................................................225
Chapter 7: Conclusions .................................................................................................228
7.1Conclusions................................................................................................................228
7.2 Summary of Research Contributions .........................................................................229
7.3 Future Research Directions........................................................................................230
References......................................................................................................................231

sinomicro

这篇论文真的是经典论文

robberxiong

感兴趣，先下来看看，正在研究这方面的东西，发愁怎么发paper呢！

zhifang

挣钱不容易。

basildy

kankan

nmos

问楼主,哪里能下到这等类似的论文呢?

microuser

谢谢楼主！

小燕子

感觉比较好，谢谢搂主，同问搂主，这些文章是在哪里找得啊？谢谢　

arsin

thank you

vincentren

谢谢楼主，光看目录就要顶起