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Your responsibility will include, but not limited to, the following:
• Understanding design specification and creating verification plan and test plan accordingly
• Creating test bench and test cases for storage controller blocks and system
• Debugging failure cases and figuring out the root causes independently, and working with designers to fix and verify bugs
• Achieving coverage goals before tape-out
• Gate simulation, timing verification and power-aware simulation
Successful candidates for these positions will have:
• Master degree or higher, electronic engineering and computer science related majors are preferred
• 1 to 5 years work experience in ASIC verification
• Experience in developing block or chip level test benches, test plan creation.
• Experience with C/C++/System Verilog/UVM
• Excellent problem analysis and debugging skills
• Good potential and willing to embrace new technical challenges
• Prior experience in storage controller verification. Experience in SATA/SAS/PCIe protocols, NAND, ARM/AXI/AHB, encryption, memory control, error management, power management. (Preferred)
• Prior experience on emulation flow and methodology (Preferred)
• Knowledge on firmware development (Preferred)
• The ability to be a team player, self-starter flexible, communicate well and understand what it takes to get the job done.
• Excellent English written, verbal and presentation skills. |
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