AMD上海热招ASIC Design Verification Engineer

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Sr/MTS/SMTSASIC Design Verification Engineer

Job Location: Shanghai




Job description:

We are currentlylooking for engineer who will be responsible for design verification of cuttingedge GPU projects. Qualified candidate will participate in and lead SoC levelfunction verification domains including:

1.        SoC DV testbench and infrastructure development and maintenance

2.        Create and execute SoC testplan including data-path and interrupt,virtualization, security, power management, etc.

3.        Implement directed and random test cases in C++/SV, as well as checkers andassertions

4.        Support integration and qualification of all the IPs for SoC

5.        Help to improve DV environment building flow




Requirement:

-   MSwith 3/5/7+ or BS with 5/7/9+ years’ experience in ASIC/SoC design verification

-   DVlead experience is a must

-   Hand-onexperience in all domains of complex ASIC DV flow from plan to coverage, both

-  Knowledgeable in C++ & SV development, familiar with scripting languageslike Ruby/Perl/Makefile…

-  Strong problem solving and communication skills

-  Knowledge on computer architecture and PCIe devices is highly preferred

-  Good knowledge on verification methodologies like UVM is a big plus

-  Experience in power-aware verification is an asset