Cadence Principal Application Engineer –前端验证热招中

kengteng

Cadence PrincipalApplication Engineer –前端验证热招中

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If you have interest, PLS send your update CV to job_china@cadence.com

Title:   Principal Application Engineer (Front-end Verification)

Location: Shanghai/Beijing

Position Description:

- Workclosely with the Sales team to identify and scope opportunities for CadenceEmulation and Acceleration products.

- Plan,execute and manage key technical evaluations and benchmark with existing andpotential customers.

- Train,ramp-up and accompany customer project.

- Conductbasic and advanced trainings, presentations and demos as necessary.

- Providingtechnical expertise to address clients’ queries, which need expert involvement.

- Alignedclosely with corporate engineering and sales/marketing team on customerrequirement for product direction/improvement.

Position Requirements:         

- 4~6 years’experience in the following areas:

- HWverification with knowledge of System Verilog/VHDL and HDL simulators

- FPGAprototyping project experience is a must

- Experiencewith hardware emulator or accelerator is a big advantage

-  Advanced Verification Methodology like UVM isa plus

- Knowledgeof Unix and Linux is highly desired

- Strongverbal and written communication skills in English

- Strongteamwork skills with good human relationship

xahaulan

good to know.