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发表于 2020-2-21 14:34:22
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IEDM Short Course 2016 Technology Options at the 5-Nanometer Node
[size=0.95]Short Course Technology Options at the 5-Nanometer Node
Organizers: An Steegen, Sr. Vice President of Technology Development, imec and Dan Mocuta, Director of Logic Device and Integration, imec [size=0.95]This course will describe the complex technological challenges at the 5nm node and explore innovative potential solutions. It begins with an in-depth discussion of patterning strategies being pursued to print critical features. Then, a pair of lectures will provide an overview of current transistor technologies and their relative strengths/weaknesses in the context of various applications such as mobility, data centers and IoT. Strategies for effective mitigation of performance-limiting parasitic resistance and capacitance will be discussed, and advanced interconnect technologies including post-copper materials options for BEOL and MEOL applications will be addressed. Lastly, metrology challenges for in-line and end-of-line process technologies will be discussed. The intent of the course is to provide a thorough understanding in process technology targets at the 5nm node and their potential solutions. Attendees will have the opportunity to learn about advanced technology options that are being actively pursued in the industry from leading technologists. [size=0.95]The course consists of lectures from six distinguished speakers: - Patterning Technology for 5 nm node, Akihisa Sekiguchi, Corporate VP & General Manager, Advanced Semiconductor Technology Division, Tokyo Electron Limited, Japan
- Extending FinFETs to 5nm node, Nadine Collaert, Distinguished Member of the Technical Staff, imec, Belgium
- Options beyond FinFETs at 5nm node, Aaron Thean, Professor of Electrical & Computer Engineering, National University of Singapore
- Front-End Parasitic Resistance and Capacitance, Reza Arghavani, Managing Director, Lam Research, USA
- Back-End Parasitic Resistance and Capacitance Mitigation, Theodorus Standaert, Sr. Engineering Mgr., Manager, Process Integration, and Dan Edelstein, IBM Fellow, IBM, USA
- Advanced Metrology, Ofer Adan, Technologist and Global Product Manager, Member of the Technical Staff, Applied Materials, Israel
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