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【上海】招聘资深Analog LAYOUT engineer-全球知名外企!
职位主要做高速高频模拟LAYOUT工作,要求本科5-10年 (Master is a plus)模拟LAYOUT经验,最好40nm以下工艺经验,英文能技术交流。
如有兴趣 简历至sophia_wu520@hotmail.com,谢谢!收到简历 我会电话联系您详细沟通的,欢迎推荐自荐~!
PositionDescription: •Skillful capable of AMS layout Designarea: Matching sense from transistor, Resistor and capacitor, Power and Groundcoupling, Signal path from Differential pairs, etc. •In-depthknowledge and hands-on experience on write Scrips to support ams back-end stuffs,such as Skill language, Perl •Proficientwith layout tools specifically Virtuoso XL and Assura •Experiencein 130nm and below analog CMOS layout, verification (DRC, LVS), and tapeout tofoundry •Abilitytocoordinate with the other analog IC circuit layout, ensuring robust, efficient,consistent and successful delivery of analog IC circuit layout. •Fundamentalunderstanding of IC design technology and process/methodology •Skilledin Analog IC top level chip assembly including floorplanning and block layout •Dedicatedexperience on key macros is prefered: High speed/high resolution DataConverters; High Speed PLL's; Oscillators; Low Noise Design; •Hands-onexperience conducting DRC/LVS analysis and recommending appropriate solutions •Solidunderstanding of IC design technology and process/methodology in AMS layout
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