Cadence上海招Sr AE Manager-Tensilica IP

kengteng

1. 工作地点最好在上海，深圳也可以考虑。请直接将简历发至HR邮箱：cecilyl@cadence.com

2. 最好有带team的经验，英语和沟通要好

3. 技术关键词：Processor,DSP,ARM,MIPS

SrAE Manager

PositionDescription:

As the manager of the APAC Tensilica IPField Applications Engineering (FAE) Team, you will be responsible for drivingtechnical and business campaign success with industry leading semiconductor andsystem companies. You will lead an IP AE team who’s role is to understandCadence’s end customer’s IP needs and provide front line technical support inPre-Sales and Post-Sales process. Strong management skills are required with aproven track record of recruiting top talent while retaining and developingexisting talent. Intimate knowledge of the SoC development process,particularly as it relates to embedded cores and DSPs is a must.

The ideal candidate will:

•Be process orientated, and drive a highperformance team culture

•Be a team player with strong problem solving and leadership skills

•Have strong customer facing skills to be able to establish technical& management credibility with the key technical decision makers

•Champion the customer needs and work with R&D and Marketing todevelop competitive and creative technical solutions to win campaigns

•Be a key contributor driving product roadmap direction for our nextgeneration products

•Have significant experience with complex SoC architecture anddevelopment flows

•Have experience and/or knowledge of one or more of Digital Audio,DSP, imaging or computer vision technologies.

•Knowledge of embedded processor or DSP architectures

&#8226revious experience with Tensilica’sXtensa processor core or derivatives is highly desirable

•Experience with DSP architectures desirable (ARM, MIPS,CEVA,Internal) – including architectural, software or HW/Debug related

•Experience of embedded software process for DSP development isbeneficial, particularly for embedded DSP core architectures

•Possess excellent communication, presentation, and interpersonalskills

The role requires a strong technicalbackground in SoC design flow from Architecture, Software development anddebug, through to implementation. Experience with system architecture, and/orsoftware or algorithm development in target markets highly desirable.

PositionRequirements:

•BS degree in ElectricalEngineering/Computer Science or related field

•At least 10+ years of SoC and/or embedded software or DSP algorithmdesign experience

请直接将简历发至HR邮箱：cecilyl@cadence.com