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本人新手，刚学会往7s64中烧写程序，就是把IAR中的USB FRAME中的USB转串口例程改下，程序中MAIN（）中有个简单的WHILE（）语句，在调试时是正常的，但是烧写到FLASH中后不是在WHILE（）处循环执行，而是执行完一遍后重新从MAIN()开始处启动，这是什么原因？和什么有关？怎么往下解决？
刚开始学ARM，很多问题不懂，希望得到高手指点，谢谢！
和启动代码有关？
;------------------------------------------------------------------------------
; Includes
;------------------------------------------------------------------------------
INCLUDE config.h
INCLUDE AT91SAM7S64_inc.h
;-------------------------------------------------------------------------------
; Constants
;-------------------------------------------------------------------------------
; Mode, correspords to bits 0-5 in CPSR
MODE_BITS DEFINE 0x1F ; Bit mask for mode bits in CPSR
USR_MODE DEFINE 0x10 ; User mode
FIQ_MODE DEFINE 0x11 ; Fast Interrupt Request mode
IRQ_MODE DEFINE 0x12 ; Interrupt Request mode
SVC_MODE DEFINE 0x13 ; Supervisor mode
ABT_MODE DEFINE 0x17 ; Abort mode
UND_MODE DEFINE 0x1B ; Undefined Instruction mode
SYS_MODE DEFINE 0x1F ; System mode
;-- Status register bits
I_BIT DEFINE 0x80
F_BIT DEFINE 0x40
;---------------------------------------------------------------
; ?RESET
; Reset Vector.
; Normally, segment INTVEC is linked at address 0.
; For debugging purposes, INTVEC may be placed at other
; addresses.
; A debugger that honors the entry point will start the
; program in a normal way even if INTVEC is not at address 0.
;---------------------------------------------------------------
MODULE ?RESET
COMMON INTVEC:CODE:ROOT(2)
PUBLIC __program_start
EXTERN ?cstartup
EXTERN ?irq_handler
EXTERN undef_handler, swi_handler, prefetch_handler
EXTERN data_handler, fiq_handler
CODE32 ; Always ARM mode after reset
org 0x00
__program_start
ldr pc,[pc,#24] ; Absolute jump can reach 4 GByte
; b ?cstartup ; Relative branch allows remap, limited to 32 MByte
; Vectors can be enabled by removing the comments below or by
; using #pragma vector from C code.
org 0x04
__undef_handler
ldr pc,[pc,#24] ; Branch to undef_handler
org 0x08
__swi_handler
ldr pc,[pc,#24] ; Branch to swi_handler
org 0x0c
__prefetch_handler
ldr pc,[pc,#24] ; Branch to prefetch_handler
org 0x10
__data_handler
ldr pc,[pc,#24] ; Branch to data_handler
org 0x18
__irq_handler
ldr pc,[pc,#24] ; Branch to irq_handler
org 0x1c
__fiq_handler
ldr pc,[pc,#24] ; Branch to fiq_handler
; Constant table entries (for ldr pc) will be placed at 0x20
; Exception vectors can be specified in C code by #pragma vector or by filling
; in the vectors below. The vector address is the ARM vector number + 0x20.
org 0x20
dc32 ?cstartup
org 0x24
dc32 __undef_handler
org 0x28
dc32 __swi_handler
org 0x2c
dc32 __prefetch_handler
org 0x30
dc32 __data_handler
org 0x38
dc32 ?irq_handler
org 0x3c
dc32 __fiq_handler
LTORG
; ENDMOD __program_start
ENDMOD
;---------------------------------------------------------------
; ?CSTARTUP
;---------------------------------------------------------------
MODULE ?CSTARTUP
RSEG IRQ_STACK ATA(2)
RSEG CSTACKATA(2)
RSEG ICODE:CODE:NOROOT(2)
PUBLIC ?cstartup
EXTERN ?main
; Execution starts here.
; After a reset, the mode is ARM, Supervisor, interrupts disabled.
CODE32
?cstartup
; Add initialization nedded before setup of stackpointers here
; Initialize the stack pointers.
; The pattern below can be used for any of the exception stacks:
; FIQ, IRQ, SVC, ABT, UND, SYS.
; The USR mode uses the same stack as SYS.
; The stack segments must be defined in the linker command file,
; and be declared above.
mrs r0,cpsr ; Original PSR value
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#IRQ_MODE ; Set IRQ mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(IRQ_STACK) & 0xFFFFFFF8 ; End of IRQ_STACK
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#SYS_MODE ; Set System mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(CSTACK) & 0xFFFFFFF8 ; End of CSTACK
#ifdef __ARMVFP__
; Enable the VFP coprocessor.
mov r0, #0x40000000 ; Set EN bit in VFP
fmxr fpexc, r0 ; FPEXC, clear others.
; Disable underflow exceptions by setting flush to zero mode.
; For full IEEE 754 underflow compliance this code should be removed
; and the appropriate exception handler installed.
mov r0, #0x01000000 ; Set FZ bit in VFP
fmxr fpscr, r0 ; FPSCR, clear others.
#endif
; Add more initialization here
; Continue to ?main for more IAR specific system startup
ldr r0,=?main
bx r0
LTORG
ENDMOD
;---------------------------------------------------------------
; ?IRQ_HANDLER
;---------------------------------------------------------------
MODULE ?irq_handler
RSEG IRQ_STACKATA(2)
RSEG CSTACK:DATA(2)
RSEG ICODE:CODE:NOROOT(2)
PUBLIC ?irq_handler
?irq_handler
;---- Adjust and save return address on the stack
sub lr, lr, #4
stmfd sp!, {lr}
;---- Save r0 and SPSR on the stack
mrs r14, SPSR
stmfd sp!, {r0, r14}
;---- Write in the IVR to support Protect mode
;---- No effect in Normal Mode
;---- De-assert NIRQ and clear the source in Protect mode
ldr r14, =AT91C_BASE_AIC
ldr r0, [r14, #AIC_IVR]
str r14, [r14, #AIC_IVR]
;---- Enable nested interrupts and switch to Supervisor mode
msr CPSR_c, #SYS_MODE
;---- Save scratch/used registers and LR on the stack
stmfd sp!, {r1-r3, r12, r14}
;---- Branch to the routine pointed by AIC_IVR
mov r14, pc
bx r0
;---- Restore scratch/used registers and LR from the stack
ldmia sp!, {r1-r3, r12, r14}
;---- Disable nested interrupts and switch back to IRQ mode
msr CPSR_c, #I_BIT | IRQ_MODE
;---- Acknowledge interrupt by writing AIC_EOICR
ldr r14, =AT91C_BASE_AIC
str r14, [r14, #AIC_EOICR]
;---- Restore SPSR and r0 from the stack
ldmia sp!, {r0, r14}
msr SPSR_cxsf, r14
;---- Return from interrupt handler
ldmia sp!, {pc}^
LTORG
ENDMOD
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发表于 2007-5-24 03:01:31
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