【社招】集成电路IC设计职位

FlowerSun0326

DDR, Logic Design, high speed

DDR数字设计工程师 简历发 芯得 爱德华 offer@hi-talent.net   
809955316@qq.com      

职位职能:  集成电路IC设计/应用工程师

职位描述:

JOB DESCRIPTION:

- Micro-architecture definition/writing IC design spec.

- Model level behavior model built up and RTL coding

- Synchronization and asynchronous digital circuit design

- Simulation/verification of functionalities at both module level and top level

- Script based synthesis & timing analysis on GHz working frequency

- Design/verification report & review meeting holding

- Silicon debug of related model functionalities

- Sampler chip testing



QUALIFICATIONS:

- BSEE with minimum 8-year or MSEE with minimum 5-year experience of digital experience

- Relevant experience in high-speed digital design (Semi-flow: customer layout + ASIC flow) is must

- Solid knowledge of high-speed asynchronous circuit design, family with standard cell architecture and behavior

- Solid knowledge of mixed signal design, digital and analog interface

- Family with low-power-design flow

- Strong skills of Verilog RTL coding, verification and debug

- Hands on experience in EDA tools such as Cadence NC-Sim, Synopsys DC, PT, etc.

- Solid knowledge of documentation of design report

- Relevant experience on telecom timing chip is a plus

- Self-motivated and team player





SOC工程师

简历发 芯得爱德华 offer@hi-talent.net  
809955316@qq.com      

岗位职责：

1. 根据芯片架构，完成模块级电路设计。

2. SOC系统级设计、集成。

3. 搭建SOC验证环境，功能仿真，覆盖率分析。

4. FPGA功能仿真调试。

5. SOC综合，时序分析，优化逻辑电路。



职位要求：

1. 电子、通信等相关专业本科或本科以上学历。

2. 有2年以上数字电路逻辑设计经验，精通SOC设计流程，有ARM SOC开发经验者优先。

3. 精通Verilog/VHDL设计语言。

4. 熟练掌握CSH或者Perl脚本语言。

5. 熟练掌握EDA设计工具，包括仿真、综合、时序分析等。

6. 了解FPGA功能仿真调试。

7. 英语CET-4，具有良好的英语读写能力

8. 具有出色逻辑思维、快速学习能力，良好沟通能力和优秀团队协作能力

9. 认真踏实，有责任心，有主动性

jacky.sun

工作地点呢