【AMD】上海招聘Sr. /MTS ASIC Verification Engineer

RecruiterAMD

AMD System Management Unit(SMU) IP team delivers differentiated system management IP for all AMD products. You'll be working with the global team on complicated clock scheme, security processing, network on chip, power management, etc.

Responsibility:
Work with RTL designer to get a full deep insight on the design under test;
Develop stressful testplan;
Build testbench;
Create testcase to ensure maximum coverage;
Develop verification IP which can be reused at different levels of verification: block level, sub-system level, SoC level, etc.

Requirement:
Master with 1+ (or Bachelor with 3+) years working experience in ASIC area;
Candidate must have one or more of the following experience/knowledge:
1) Micro-processor (e.g. ARM) architecture and peripheral;
2) Popular on-chip bus (AMBA/AXI) or NOC;
3) low power design and verification methodology;
4) Standard IO IPs, including SPI/SMBUS/GPIO/I2C/I2S/UART;
5) DFT/JTAG, etc.
Excellent knowledge of design verification methodology, such as OVM/UVM, system Verilog;
Solid experiences with simulation model creation and the testbench build;
C/C++ software development experiences is a plus;
Good communication skill and fluent English;
Good team player and strong sense of responsibility to deliver on time.

符合条件的请将简历发送至Maggie1.Zhang@amd.com，邮件主题标明应聘职位，谢谢。