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[招聘] AMD上海研发中心热招Senior ASIC verification engineer for SMU team

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发表于 2015-6-19 11:37:55 | 显示全部楼层 |阅读模式

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工作要求如下

Responsibility:
• Work with RTL designer to get a full deep insight on the design under test
• Develop stressful testplan
• Build testbench
• Create testcase to ensure maximum coverage
• Develop verification IP which can be reused at different levels ofverfication: block level, sub-system level, SoC level, etc.
Requirement:
• Master with 1+ (or Bachelor with 5+) years working experience in ASIC area
• Candidate must have one or more of the following experience/knowledge: 1)Micro-processor (e.g. ARM) architecture and peripheral; 2) Popular on-chip bus(AMBA/AXI) or NOC; 3) low power design and verification methodology; 4)Standard IO IPs, including SPI/SMBUS/GPIO/I2C/I2S/UART; 5) DFT/JTAG, etc.
• Excellent knowledge of design verification methodology, such as OVM/UVM,systemverilog
• Solid experiences with simulation model creation and the testbench build
• C/C++ software development experiences is a plus
• Good communication skill and fluent English
• Good team player and strong sense of responsibility to deliver on time


有兴趣的同学请把简历以附件形式发送给Maggie1.Zhang@amd.com,邮件主题标明应聘职位。

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