【社招】IC ASIC职位大放送

FlowerSun0326

简历发 809955316@qq.com
1.IC verification engineer（video）

Verification Video

职位职能:  高级硬件工程师

职位描述:

Job responsibilities:

The candidate will take part in HEVC/H265 video codec IP development team as verification player. He or she will take part of these responsibilities:

1. Co-work with architect and designers to understand architecture specification and micro architecture specification.

2. Extract features or test points from specifications to work out detail test plans.

3. Develop verification environment and components, like test bench, models, checkers, monitors etc.

4. Discuss with architect and designers to develop test cases, including corner cases.

5. Understand cmodel and dump necessary data for stimulus and golden reference.

6. Co-work with designers to debug failed tests.

7. Develop and improve scripts for regression system, flow automation etc.

8. Analyze coverage and fill uncovered holes.

Job requirements:

1. 3+ years experience with Master degree, or 5+ years experience with Bachelor degree.

2. Video codec ASIC experience and knowledge, like MPEG2/4, H264, etc. HEVC/H265 would be a big plus.

3. Veteran in ASIC verification, especially in UVM/SystemVerilog/SystemC etc.

4. Familiar with scripts, like perl/shell/Makefile and Linux OS.

5. Solid C/C++ knowledge and experience in modeling would be a big plus.

6. Good team player and quick learner, self motive and quick problem solving skills.

7. Fluent oral and written English.

3. ASIC Design IP Core H.264 MPEG

职位职能:  高级硬件工程师

职位描述:

Position Description:

The candidate will be the part of the design team for the development of next generation of video codec IP, the responsibilities include:

1.Micro-architecture definition;

2.Logic implementation with Verilog HDL;

3.Block-level verification;

4.Synthesis and pre-layout/post-layout timing closure;

5.Power analysis and reduction;

6.FPGA prototyping and debugging;

Qualification:

7.BS with 5+ years or MS with 2+ years experiences in electronic engineering/micro-electronics;

8.Expect elf-motivation and team player;

9.Solid skills and rich experiences in logic design, synthesis and timing analysis;

10.Hands-on engineering experiences in video codec development, familiar with video coding standard such like H.264/AVC, MPEG-4, AVS etc.;

11.Familiar with all front-end flows including LINT check, simulation, synthesis, STA, formal and power analysis, etc.;

12.Knowledge and experiences in Computer Architecture and RISC processor (ARM/MIPS/SPARC) micro-architecture would be a great plus;

13.Familiar with AXI4/AXI3 protocol, memory controller would be a plus;

14.Experience in FPGA prototyping and debugging would be a plush;



5. Senior video architecture

Position Description:

The video architect will be working closely with the algorithm team and design team for development of next generation video codec IP, the responsibility includes::

1.Work with algorithm team to develop the C Model for video decoder/encoder of H.265/HEVC;

2.Work with design team for the micro-architecture definition of video codec IP for H.265/HEVC;

3.Develop video testing framework for Video codec IP performance evaluation, analysis and tuning;

Qualification:

4.BS with 5+ years or MS/Ph.D with 2+ years experiences in electronic engineering/computer science;

5.Proactive, creative and team player;

6.Proficient in video and image processing techniques, in-depth understanding of algorithm and implementation for video coding standards such as MPEG-2, MPEG-4, H.263, H.264/AVC;

7.Proven related engineering experiences in architecture/micro-architecture definition for video codec development with successful tape-outs/production;

8.Solid programming skills with C/C++;

9.Knowledge/experiences of computer architecture is a plus;



6. (Sr.) ASIC Design Verification Engineer

Position Description:

As part of the IP design team, the candidate will be responsible for the pre-silicon verification of in-house designed micro-processor which is a built-in component for next generation video codec IP, including:

• Build up and maintain verification environment, including development of testbench and test generators for block-level and full-chip level simulation;

• Develop and execute functional verification test plans, include writing tests, developing behavioral checkers and coverage/code monitors; Analyze coverage gaps and devise strategies to fill coverage holes;

• Work with designers to debug failing tests and resolve bugs;

• Help develop and maintain flows/scripts/tools for front-end design/verification;



Qualification:

• BS with 5+ years or MS with 2+ years experiences in electronic engineering/micro-electronics;

• Self-motivated team player, with strong problem resolving skills;

• Proficient and experienced in high-level verification methodology (VMM/UVM/OVM), Verilog-HDL, and hardware verification language (SystemC/SystemVerilog);

• Familiar with video coding standard, and/or computer architecture/micro-architecture;

•Hands-on experienced in CPU verification, including test plan and test bench development, test case development and test coverage assessment would be a great plus;

• Experiences in assembly programming, and using scripting languages (Perl/Tcl/Bash/Csh) for flow automation;

• Familiar with front-end ASIC design flow;

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