[NVIDIA]招聘Physical Design Engineer（EDA Methodology）

NVHR

Hello All,

大家好，这边是NVIDIA HR Tracy, 我们目前在北京和上海有招聘VLSI Physical Design Engineer(EDA Methodology)的岗位，具体职位描述如下，如果大家有意向，可以发送简历到tracyw@nvidia.com， 收到简历 我会及时与你们联系。

Senior/Physical Design Engineer--Description
As senior role in physical design for NVIDIA GPU and Mobile chips.
Participate in various aspects of physical design, including full chip floor planning, power/clock distribution, timing optimization, place & route, timing closure, power/signal integrity analysis, and physical verification.
Troubleshoot a wide variety of design and flow complicated issues, and apply proactive intervention
Collaborate with RTL, DFT and Circuit designers to ensure the high quality of design implementation and optimization.
Minimum requirements:  
        BS in Engineering or Science.
        Power user of EDA tools from Synopsys (ICC/DC/PT/STAR-RC), Cadence (EDI/EPS) or Mentor (Olympus-SOC).
        Experience in Clock/Power Distribution, P&R, Timing closure, RC Extraction, and verification on 40nm, or 28nm technology.
        years of experience in above areas.

Prefer Requirements:
        MS in Engineering or Science.
        Knowledge in 20nm or FinFET technology, circuit design, and package design.
        Experience in physical verification tools from Synopsys (ICV/Mojave) or Mentor (Calibre).
        Proficiency in Perl, TCL and Makefile scripts.

Tracy Wu
APAC Staffing Team
Mail: tracyw@nvidia.com
QQ: 1751315121

995331220

报名。。。晚点发简历

NVHR

回复 2# 995331220


    好的  简历可以发到 tracyw@nvidia.com