著名美资上市公司诚招Staff layout engineer

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著名美资上市公司诚招Staff layout engineer，地点：上海，如有兴趣，欢迎添加微信：taiyanqian或QQ：970890075了解详细的信息。  

Duties

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Leadwhole chip layout design, responsible for floorplan, schedule create and tapeout action.

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Responsiblefor the main block layout place and routing, DRC, LVS, ERC violation check.Responsible for top layout violation check.

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Communicationwith design team, PM and foundry team.

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Layouttechniques to improve circuit performance, lead the team complete the projectlayout on time.

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Workwith design to define optimal layout solutions, based on design objectives.

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Leadteam growth in the new technology.

Requirements

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Experiencein Analog IC layout skills, like bandgap voltage reference, devices matchingand ESD/Latchup knowledge

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Experiencein high current, high voltage circuit layout, high accuracy Opamp

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Experiencein Cadence OA IC Layout tool set

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7+years of analog IC layout experience

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Team-based,cross-functional organizational structure experience preferred

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BSdegree or equivalent experience

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Strongcommunications skills; written, verbal, presentation and listening;

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Goodinterpersonal skills to work in a team environment;

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Goodcommand of written and spoken English required;

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Excellentinterpersonal, written communication and presentation skills

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