上海需要一位 SOC/HW-VLSI/Validation SDC

KT咨询-IC电子

【猎头职位：上海需要一位  SOC/HW-VLSI/Validation SDC】联系人：Grace-Tai，邮箱：hr@kthr.com，微信也可查询职位啦！打开手机微信，搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加，欢迎大家关注！

Responsibilities:               

-Interfacing with the design teams toensure DFT design rules and guidelines are met；

-Verification of ATPG test patterns for(SAF) stuck-at, transition fault (TDF), Path Delay fault (PDF) models；

-MBIST verification and test patterngeneration through Mentor tool；

-Work closely with design team on IDDQconstrains validation；

--Work with design team on functional DFTtest pattern generation and simulation；

-Simulating and verifying the ATPG (SAF, TDF)and MBIST patterns on unit delay and min/max timing corners；

-Work with QVPS team on the test vectorsimulation and delivery；

-Work with Test Engineers to debug/diagnosemanufacturing defects；

-Maintain existing DFT verificationenvironments；

-Developing, enhancing and maintainingscripts as necessary；

Basic Qualifications:         

Required:

5+ years ASIC/DFT and various aspectssimulation, Silicon validation or similar education/experience equivalent；

Preferred:

-Detailed knowledge on DFT concepts,pattern simulation, Silicon debug；

-JTAG, MBIST, Scan Compression, ATPG, FaultSimulation and at-speed testing；

-Rich experience with analog test, such as PLL,ADC, DAC, PHY PRBS testing；

-Rich experience with gate level simulation；

-Rich experience with UVM；

-Excellent problem solving skills；

-Experience with one or more scriptinglanguages(Perl/TCL) is desired；

-Strong written and verbal communicationskills；

Education Requirements  

BS/MS degree in Electrical Engineering,Computer Science, or related field.