ELC仿真D触发器不能识别

zhy910827

自己画了带复位的D触发器，然后写了gate文件：DESIGN ( DFCND );
//      =================
//       PORT DEFINITION
//      =================

INPUT CP ( CP );

INPUT D ( D );

INPUT CDN ( CDN );

OUTPUT QN ( QN );

OUTPUT Q ( Q );

SUPPLY1 VDD ( VDD );

SUPPLY0 VSS ( VSS );
//      ===========
//       INSTANCES
//      ===========

IMUX ( XP, CP, P, D );

NAND ( P, XP, CDN );

IMUX ( QN, CP, P, Q );

NAND ( Q, QN, CDN );
END_OF_DESIGN;
可是不能正确识别前一级锁存结构：
==============================
      DESIGN : DFCND2
==============================
[WARNING(db_gsim)] illegal function in gate file :
- register(Q,QN) is recognized.
- loop recognition error ( multi stage ) loop( imux： $2 nand: $1 )
- loop node ( $1 ) is found
- loop node ( $2 ) is found
- naked output ( Q ) is found
- naked output ( QN ) is found


怎么办？