Cadence SH 招聘Principal/Lead Customer Support Engineer -DDR PHY

kengteng

Cadence SH 招聘Principal/LeadCustomer Support Engineer -DDR PHY

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Title: Principal/Lead Customer Support Engineer -DDR PHY

  

Position Description:

Cadence is looking foran individual to work in an established DDR Design IP team. The group providesconfigurable DDR memory controller and PHY IP for ASICs. The job will befocused on providing technical support to customers, however there will be avariety of other engineering tasks that will allow the candidate to expandskills and responsibilities.

Provide technicalsupport to customers for integration of IP into ASICs including:

- Debugging ofcustomers’ simulation or silicon issues

- Reviewing ofcustomers’ integration of our IP

- Reviewing statictiming reports to assist with customers’ timing closure

- Answering technicalquestions about IP operation

- Train fieldengineers in IP operation

- Interface with theR&D and marketing teams to make product improvements and resolve customerissues

Position Requirements:

Essential Skills andexperiences needed:

- Excellent oral andwritten communication skills in Chinese and English

- All front-end skills– RTL design & verification in Verilog, synthesis, static-timing analysis,DFT

- Time managementskills sufficient to balance multiple high-priority projects

- Willingness to learnnew skills and perform tasks that often go outside area of current expertise

Additional DesirableQualifications:

- Back-end skills –place & route, physical verification, timing closure, power analysis

- Experience withStatic Timing scripts and report analysis

- Familiarity with DDRmemory operation, system applications, AMBA protocols

- Scripting in Perl,TCL, etc.