【Marvell全职】Digital Design+Verification Engineer

Hwangbo

Job Title:Digital Design and Verification Engineer

Location: Shanghai

Description:

In this position, the candidate will be working with Marvell AudioProcessor and Codec product line. The candidate will be responsible fordeveloping blocks/IP, interface modules and datapath RTL in audio processorsand audio codec products. The candidate will be working closely with DSP architectureteam, where he/she will be responsible for taking design specifications to RTL.The candidate will also be responsible for developing test environment for thedeveloped block. The candidate should have excellent RTL design andverification skills.

Qualifications:

MSEE with 5+ years of experience or PhD with solid academic background inthe following area：

·Micro-architecturedevelopment and Verilog RTL coding

·Strong knowledgeof Datapath design

·Strong knowledgeof control and FSM design

·Strong knowledgeof various test methodologies such as UVM/VVM/OVM. Experience in developingfunctional coverage, assertions and directed/random tests

·Strong knowledgeof Verilog test bench development

·Strongunderstanding and experience in serial and parallel interface design

·Solid backgroundin mixed signal and low power design methodologies

·Goodunderstanding of ASIC implementation flow – timing constraints, synthesis (DC),timing closure (PT/PTSI) and formal verification

·Excellentcommunication and documentation skills

The following skills are a plus

- Knowledge of Matlab, C, Perl and TCL

- Knowledge of System Verilog

- Experience with ARM architecture

- Experience with filter design and other signal processing tasks

If you are interested in any one of the four positions, please send your resume to the following email address:   linluo@marvell.com

Subject of your email should be: School_Name_Applied position_Information source
Eg.SJTU_Zhang Peng _Data Analyst_BBS