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周末职位派放了
浦西美资半导体公司寻 senior layout engineer,有兴趣的可以发简历到我公司邮箱 hamy-wang@kthr.com ,或者加一下Q:1349541957 详细咨询
具体职位JD,请参考
Job Title: Sr. Layout Engineer
Duties ·
Lead whole chip layout design, responsiblefor floorplan, schedule create and tape out action. ·
Responsible for the main block layout placeand routing, DRC, LVS, ERC violation check. Responsible for top layoutviolation check. ·
Communication with design team, PM and foundryteam. ·
Layout techniquesto improve circuit performance, lead the team complete the project layouton time. ·
Work with designto define optimal layout solutions, based on design objectives. ·
Lead team growth in the new technology.
Requirements
·
Experience inanalog IC layout skills, like bandgap voltage reference, devices matching andESD/Latchup knowledge ·
Experience in high
current, high voltage circuit layout, highaccuracy Opamp ·
Experience inCadence OA IC Layout tool set ·
5+ years of analog IC layout experience ·
Team-based,cross-functional organizational structure experience preferred ·
BS degree or equivalentexperience ·
Strongcommunications skills; written, verbal, presentation and listening; ·
Goodinterpersonal skills to work in a team environment; ·
Good command ofwritten and spoken English required; ·
Excellentinterpersonal, written communication and presentation skills |