Part I: Sub-threshold leakage and short-channel effect simulation (亚导通漏电流和短沟道效应)
(1) Find the sub-threshold leakage for the NMOS and PMOS transistors with minimum size from ID vs. VGS plot;
(2) Obtain the sub-threshold slop;
(3) Extract the process parameter nfrom the plot
(4) Plot the output characteristic for both transistors`;