【内部推荐】Brite灿芯招聘ASIC/SOC设计验证工程师

Brite_SOC · 发表于 2014-8-15 22:27:09

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诚聘如下职位：

有兴趣者，请发简历至：harmonization@126.com

Description:

RTL design and verification for the embedded CPU subsystem in the wireless baseband ASIC
RTL design and verification associated with top-level/centralized blocks and integration of third-party/in-house IPs (e.g., PCIe/SDIO/USB/ARM/ARC)
Chip-level methodology (clocks, resets, test planning)
Synthesis/STA/LEC/DFT implementation
FPGA prototyping
Silicon Validation

Familiarity with embedded CPUs (ARM/CEVA), PCIe, SDIO, USB, SATA, MIPI interface protocol would be a big plus.

Required Skills:

BSEE with 6+ years, MSEE with 4+ years of experience, or equivalent combination of education and experience.
Prior experience with subsystems built around embedded processors (CEVA/ARM) would be highly desirable
Hands on experience on synthesis/STA/LEC/DFT would be highly desirable
FPGA emulation/debug experience would be desirable
Well organized, methodical, and detail oriented
Must be a team player and easy to work with

Brite_SOC · 发表于 2014-8-17 20:07:32

up！！！

asdfeidian · 发表于 2014-8-17 21:31:05

工作地点？

Brite_SOC · 发表于 2014-8-19 21:26:50

上海灿芯

Brite_SOC · 发表于 2014-8-21 19:08:30

up!!!

Brite_SOC · 发表于 2014-8-22 19:58:58

up（（（（

Brite_SOC · 发表于 2014-8-24 15:24:15

uppppp

渐行渐远 · 发表于 2014-8-26 12:02:12

社招吗？

Brite_SOC · 发表于 2014-8-27 21:30:02

社招。。。

Brite_SOC · 发表于 2014-8-28 23:52:51

upupup

[招聘] 【内部推荐】Brite灿芯招聘ASIC/SOC设计验证工程师