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[招聘] 【Marvell招聘】Senior/Staff Design Verification Engineer

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发表于 2014-8-1 18:00:16 | 显示全部楼层 |阅读模式

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Job Title
Senior/Staff Design Verification Engineer

Department: Video

Work location: Shanghai


Job Responsibility


- work closely with designers on verification test plan definition and test development
- work closely with architects on performance modeling and validation
- regression infra development
- coverage analysis and enhancement
- behavioral model and BFM development
- unit-T and timing gate-level verification
- develop IPs verification suites
- silicon bring up and debug support

Qualifications:
Must have:
- minimum 4+/8+ years of asic verification experience
- BSEE degree or equivalent
- strong programming skills, proficiency in C++, system verilog
- working knowledge of scripting language (Perl, Python, etc.)
- working knowledge of verification methodlogies such as VMM, OVM or UVM
- good communication skill
- good team work spirit
Nice to have:
- familiar with DTV/STB architecture, design, IP and system
- MSEE degree or above

Please kindly send your resume to emilyye@marvell.com with the subject"Senior/Staff Design Verification Engineer:"If you are interested in the position.The preferred resume format is"姓名_学校_学历_工作年限_目标职位"
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